Staff DFT EngineerMarvell
🚀 We’re Hiring | DFT Engineers at Marvell Technology – Bangalore
My team at Marvell Technology is looking for experienced Design for Test (DFT) Engineers to join our Connectivity Silicon programs in Bangalore.
We have the following openings:
🔹 Staff DFT Engineer – 4 Openings
• 4–8 years of relevant DFT experience
• B.Tech + 6 years or M.Tech + 4 years of experience
🔹 Principal DFT Engineer – 1 Opening
• 14+ years of relevant DFT experience
🔍 Key Skills & Experience:
• Strong DFT experience with complex SoCs and advanced chip designs
• End-to-end DFT implementation, from RTL to silicon
• Scan insertion, MBIST, EDT/OCC and IEEE 1687 (IJTAG)
• ATPG generation, pattern verification and retargeting
• Post-silicon bring-up and ATE debug support
• Strong understanding of DFT methodologies and test implementation
💡 What you’ll work on:
• Full block-level ownership across advanced chip implementations
• DFT implementation and ATPG flows
• High-impact Connectivity silicon projects
📍 Location: Bangalore, India
📩 Interested candidates who meet the above criteria are welcome to share their updated resumes with me for reference.
Email: pprasanna@marvell.com
If you know someone who would be a good fit, please feel free to share this opportunity with them!
#Marvell #Hiring #DFT #DesignForTest #VLSI #Semiconductor #Bangalore
tal saysjoin marvell in bangalore as a staff dft engineer working on advanced connectivity silicon
engineering
staff
Bangalore
public
dftatpgmbistijtagrtl
comments 1 anon